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Many computer science and compiler-technology related issues overlap with computer architecture issues. I can say comfortably, that the beginning material (especially the Appendix) forms a very good summary, and sometimes, a more extensive explanation of some of the fundamental concepts covered in the strictly undergraduate Hennessey-Paterson book 'Computer Organization and Design 3ed' (COD3ed) (COD3ed has now been succeeded by a newer 4ed book). I have read Appendices A, B, and C and Chapters 1, 2, and half of 3. A more rigorous revision of this book may make it a master book. Sometimes the author makes the mistake of discussing pitfalls and fallacies at too abstract a level and at great lengths rather than making short, precise, and blunt statements. Ultimately, it is the science and structure we are interested in as students, but it is the art which dominates the reality, making this a very elusive subject.
If you have both books (CA4ed) and (COD3ed)*, try the following sequential reading order:*please note there is a newer 4th edition of COD on amazon which you might wish to consult or purchase instead of COD3ed-for performance metrics study the following essential parts of COD3ed ->Chpt4-Performance ->CD sections: "In More Depth-Amdahl's Law" and "In More Depth-MIPS,MOPS,FLOPS"-read CA4ed's "Chpt1-Fundamentals of Computer Design"-read CA4ed's Appendices A and B-read COD3ed's "Chpt7-Large and Fast: Exploiting Memory Hierarchy" and CA4ed's "AppendixC-Review of Memory Hierarchy"-read Chpts 2 and 3 of CA4ed for dynamic-scheduling/branch prediction/speculation/limitations on ILPThe remaining 3 chatpers of the book make up more advanced Memory Hierarchy concepts which usually constitute as material for a second graduate-level course in Computer Architecture. Hence, I recommend the following personally tried reading format for those who are familiar with the undergraduate book (COD3ed) but still want a smooth transition to CA4ed. Although I haven't tried this, I would recommend rereading some of the basic cache concepts in Appendix C as a refresher, followed by reading Chpts 4 and 5 of CA4ed. Finally reading COD3ed's "Chpt 8-Storage, Networks, and Other Peripherals" followed by CA4's "Chpt 6 Storage Systems". The beginning part of this book is oriented towards a 4th-year undergraduate/1st-year graduate crowd. However, at times, it seems the author is living in their own paradigm, and doesn't present more grounded examples of design work. As an engineer, I am interested in real world design approaches and considerations.
It seems he is being careful about the academic criticism he may receive and thus makes many ambiguous statements in the process. Towards the end of a chapter, you start feeling there is no structure to the material as all types of loosely-defined terms come crashing and conflicting with earlier ones. The CD includes Appendices on other computer architecture related material in: D-Embedded Systems, E-Interconnection Networks, F-Vector Processors, G-Hardware and Software for VLIW and EPIC, H-Large Scale Multiprocessors for Scientific Applications, I-Computer Arithmetic, and J-Survey of Instruction Set Architectures. Even if you are familiar with COD3ed, it can nevertheless prove to be a little daunting to read CA4ed. However it is better to contain and educate in a piecemeal fashion rather than overwhelm and strike bewilderment.
That concludes the bulk of the book. I have read some of the material on Appendix E and it makes for a good introduction on basic networking concepts as it leads into discussing some of the Playstation 3's Cell processor's ring-based interconnection topology.Overall, I have to agree with many positive statements that this book sets a new standard for presenting informative material supported by charts/graphs and commentary from years of designer experience. What has become clear to me is that microprocessor system-design is a heuristic process and the book sways back and forth between the art and science of design. Four stars.
There was a couple things I hoped would be in the book, like GPGPUs. I don't know if this book was really hard for me to follow because my professor wasn't very good, or if the book was plain hard to read. It didn't explain things as well as it should, and I couldn't really get help from lecture. It does give a lot of information though, I'm not saying I didn't learn anything.
This book is best coupled with classes and online material found via search engine of your choice.Many universities take the slides and adapt them to their curriculum and post materials accessible online which may be useful.There are some errors in the book and I have yet to track down the errata (even though they provide a link to a place to find it, seems to be only for professors. I've used this book for an Advanced Computer Architecture book in my graduate studies (it seems so has every other graduate course, which has an added bonus).The book falls in line with most educational books - mediocre at best. The samples are weak and seldom useful. Not quite sure what that is about.).I'm a bit biased, I thought learning about RAID systems, cache optimization, memory optimization, etc - would have been a bit more interesting and challenging. I've mostly found it dull, ancient, and redundant (Zing).
This book is definitively not intended for computer enthusiasts.I bought this book for my Computer Architectures Class, and even my professor agreed that it's intended for professional that are deep into the field of processor design and implementation.All in all a Very good book that packs a lot of information per square inch, but get ready for a lot of performance calculations.
But it doesn't have to. This book isn't for the timid. It will give you the background needed that when you go to the website that have technical details of a new architecture (e.g. It goes deep into several recent CPU designs and explains why the architectures turned out the way they did. There is decent coverage of RISC versus CISC ideas, and why CISC now dominates (hint: it is a combination of luck, marketing, and massive amounts of available transistors, plus new ways of instruction-level parallelism).It does not cover the absolute latest processors. Ars Technica), chances are good you will know the concepts they reference.Who shouldn't buy this: Programmer's in high level languages expecting to learn some black magic way to speed up your code. Even assembly language programmers have been mostly sidelined by the power of a modern CPU to optimize high-level languages.
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